1. Technical Field
Embodiments of the present disclosure generally relate to integrated circuit devices and to semiconductor modules.
2. Related Art
In general, a semiconductor module may be designed with two or more independent sets of semiconductor chips connected to the same address and data buses, and each set is called a rank. Thus, the semiconductor module may be categorized as either a single rank module or an “N” rank module (wherein, “N” denotes a natural number which is equal to or greater than two) according to the number of the ranks. That is, all the semiconductor chips in the single rank semiconductor module may be concurrently accessed at any given time while the semiconductor chips in the “N” rank semiconductor module may be divided into “N” groups which are independently accessed during different time periods from each other.
Within semiconductor systems, it is generally necessary to match the impedance of a transmission line (e.g., a transmission channel) with the corresponding termination impedance (e.g., a termination resistor) in order to prevent undesirable signal reflections. Such signal reflections act as noises on the signal line in relation to signals subsequently transmitted on the transmission line. The termination resistors of the conventional semiconductor modules or systems have been disposed outside semiconductor chips constituting the semiconductor modules or systems. However, in the event that the termination resistors are disposed outside high performance semiconductor chips such as double data rate 2 (DDR2) synchronous dynamic random access memory (SDRAM) chips, there may be some limitations in preventing the undesirable signal reflections.
Recently, the termination resistors have been disposed inside the high performance semiconductor chips to prevent the undesirable signal reflections. That is, on-die termination (ODT) circuits have been widely used in the semiconductor modules and/or the semiconductor systems. In general, the ODT circuit may be enabled when an ODT signal having a high logic level is applied to an ODT pad of the semiconductor chip, and the ODT circuit may be disabled when an ODT signal having a low logic level is applied to the ODT pad of the semiconductor chip.
When the semiconductor chips include the ODT circuits, ODT signals may be required to operate the ODT circuits included in the semiconductor chips and the semiconductor module should be configured to include input pins for receiving the ODT signals. If the number of the input pins of the semiconductor module increases, manufacturing costs of a semiconductor package including the semiconductor module may also increase. Accordingly, technologies for internally activating the ODT circuits without use of the input pins have been continuously proposed and required.